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2                                                 Transport aspects


            E.4.1   BIP-8 transparency

            The transcoding method used for 40GBASE-R is timing and PCS codeword transparent. In normal operation,
            the  only  aspects  of  the  PCS  encoded  bitstream  that  are  not  preserved  given  the  mapping  described  in
            annexes B, E and F are for one the scrambling, since the scrambler does not begin with a known state and
            multiple  different  encoded  bitstreams  can  represent  the  same  PCS  encoded  content,  and  secondly  the
            BIP-8  value  in  the  Ethernet  path  or  more  precisely,  the  bit  errors  that  occur  between  the  Ethernet
            transmitter and the ingress point of the OTN domain and within the OTN domain. The BIP-8 values can be
            preserved with the scheme described below. As the scrambling itself does not contain any information that
            has to be preserved, no effort has been made to synchronize the scrambler states between OTN ingress
            and OTN egress.

            Unfortunately, since the BIP-8 is calculated on the scrambled bitstream, a simple transport of the BIP-8
            across the OTN domain in the transcoded lane marker will not result in a BIP-8 value that is meaningful for
            detecting  errors  in  the  received,  descrambled,  transcoded,  trans-decoded,  and  then  rescrambled  bit
            stream.
            To preserve the bit errors between the Ethernet transmitter and the egress side of the OTN domain, the
            bit-error handling is divided into two processes, one that takes place at the OTN ingress side, or encoder,
            and one on the OTN egress side, or decoder.

            At the OTN ingress an 8-bit error mask is calculated by generating the expected BIP-8 for each PCS lane and
            XORing this value with the received BIP-8. This error mask will have a "1" for each bit of the BIP-8 which is
            wrong, and a "0" for each bit which is correct. This value is shown as a PCS BIP-8 error mask in Figure E.2.

            In the event no errors are introduced across the OTN (as an FEC protected network can be an essentially
            zero error environment), the PCS BIP-8 error mask can be used to adjust the newly calculated PCS BIP-8 at
            the  egress  providing  a  reliable  indication  of  the  number  of  errors  that  are  introduced  across  the  full
            Ethernet path. If errors are introduced across the OTN, this particular BIP-8 calculation algorithm will not
            see these errors.

            To overcome this situation, a new BIP-8 per lane for the OTN section is introduced. In the following this
            new BIP-8 will be identified as OTN BIP-8 in order to distinguish it from the PCS BIP-8.
            It should be noted that the term OTN BIP-8 does not refer to and should not be confused with the BIP-8
            defined in the OTUk overhead (byte SM[2]).
            The OTN BIP-8 is calculated similarly to the PCS BIP-8 as described in clause 82.2.8 of [IEEE 802.3] with the
            exception  that  the  calculation  will  be  done  over  unscrambled  PCS  lane  data,  the  original  received  lane
            alignment marker, after error control block insertion and before transcoding. Figure E.2 shows the byte
            location of the OTN BIP-8 in the transcoded lane marker.

            The transcoded lane marker is transmitted together with the transcoded data blocks over the OTN section
            as defined in Annex B. At the OTN egress after trans-decoding and before scrambling, the ingress alignment
            marker is recreated using M0, M1, M2 and ingress BIP3 of the transcoded alignment marker followed by the
            bit-wise inversion of these bytes. This recreated alignment marker together with the trans-decoded and
            unscrambled data blocks is used to calculate the expected OTN BIP-8 for each PCS lane (refer to clause
            82.2.8 of [IEEE 802.3]). The expected value will be XORed with the received OTN BIP-8. This error mask will
            have a "1" for each bit of the OTN BIP-8 which is wrong, and a "0" for each bit which is correct.
            The egress BIP3 for each PCS lane is calculated over the trans-decoded and scrambled data blocks including
            the trans-decoded alignment marker (refer to clause E.4) following the process depicted in clause 82.2.8 of
            [IEEE 802.3].

            The egress BIP3 is then adjusted for the errors that occurred up to the OTN egress by first XORing with the
            PCS BIP-8 error mask and then XORing with the OTN BIP-8 error mask. This combined error mask will be
            used to compute the number of BIP errors when used for non-intrusive monitoring.

            The BIP7 is created by bit-wise inversion of the adjusted BIP3.




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