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Transport aspects                                              2


            D.4.2   CnD(t) encoding and decoding for OPUCn

            The cumulative value of CnD(t) (CnD(t)) is encoded in the ODTUCn.ts justification control bytes JC1, JC2, JC3,
            JC4, JC5 and JC6. Bits D1 to D18 carry the value of CnD(t). Bit D1 carries the most significant bit and bit D10
            carries the least significant bit. As shown in Figure 20-7, bits D1 to D7 are located in bits 2-8 of JC4, bits D8
            to D9 are located in bits 1-2 of JC1, bits D10 to D16 are located in JC5, and bits D17 to D18 are located in
            bits 1-2 of JC2.
            The CRC-9 located in bits 2-8 of JC6 and bits 1-2 of JC3 is calculated over the D1-D18 bits in JC4, JC1, JC5 and
                                                2
                                            3
                                        9
            JC2. The CRC-9 uses the g(x) = x  + x  + x  + 1 generator polynomial, and is calculated as follows:
            1)      The JC4 bits 2-8, JC1 bits 1-2, JC5 bits 2-8, and JC2 bits 1-2 are taken in network transmission order,
                    most significant bit first, to form an 18-bit pattern representing the coefficients of a polynomial
                    M(x) of degree 17.
                                        9
            2)      M(x) is multiplied by x  and divided (modulo 2) by G(x), producing a remainder R(x) of degree 8 or
                    less.
                                                                                   8
            3)      The coefficients of R(x) are considered to be a 9-bit sequence, where x  is the most significant bit.
            4)      This 9-bit sequence is the CRC-9 where the first bit of the CRC-9 to be transmitted is the coefficient
                                                                    0
                        8
                    of x  and the last bit transmitted is the coefficient of x .
            The de-mapper process performs steps 1-3 in the same manner as the mapper process, except that here,
            the M(x) polynomial of step 1 includes the CRC bits of JC6 and JC3, resulting in M(x) having degree 26. In
            the absence of bit errors, the remainder shall be 000000000.
            A parallel logic implementation of the source CRC-9 is illustrated in Appendix VI.





















































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