Page 55 - ITU Journal Future and evolving technologies Volume 2 (2021), Issue 7 – Terahertz communications
P. 55

ITU Journal on Future and Evolving Technologies, Volume 2 (2021), Issue 7




          technologies  at  22-nm  and  28-nm  might  also  be   in  the  matching  network.  On  the  other  hand,  we
          considered for the benefit of digital integration but   consider  a  power  target  and  investigate  the
          typically  do  not  offer  substantially  different   required size of the transistor. A larger transistor
          performance in UmmW bands than 65-nm or CMOS         introduces  design  challenges  to  distribute  the  RF
          SOI  processes  and  the  process  parameters  are   power into and out of the transistor. A large device,
          generic.  The  roadmap  of  RF-optimized  InP  HBT   relative to the wavelength, typically incurs a drop in
          processes  has  been  discussed  in  [11]  and  [12].   the  potential  fmax.  At  140  GHz,  a  device
          Current 250-nm InP HBT processes are capable of      width/length  of  more  than  200  um  would  pose
          fmax  exceeding  600  GHz  while  being  relatively   significant conditions to distribute the signal.
          mature  with  commercial  applications.  Scaling  to
          130-nm and beyond can yield fmax exceeding 1 THz.
          The  evolution  of  SiGe  HBTs  has  also  produced
          remarkable  fmax  increases  that  have  reached
          similar speeds to InP [13]. SiGe BiCMOS processes
          have  been  optimized  for  digital  and  RF
          performance [14]. Current processes offer several
          differentiated HBTs in a  single  process optimized
          for  breakdown and fT/fmax.  CMOS SOI  processes
          based  on  partially  depleted  SOI  substrates  have
          evolved  from  a  digital  process  to  RF-optimized
          approaches with high-resistivity substrates and RF
          back end-of-the-line [15]. CMOS and CMOS SOI offer
          similar  supply  and  knee  voltage.  The  40-nm  GaN
          HEMT  process  is  described  in  [16]  and  offers  a
          400-GHz fmax. The characteristics of the different    Fig. 4 - Comparison of process technology trade-offs under
          processes  is  summarized  in  Table  1  with  an     fixed  resistance  (50  Ohm)  and  fixed  power  (20  dBm)
          emphasis on commercially available processes with     conditions.
          the highest fmax.                                    First,  to  minimize  the  loss  of  the  impedance

          Table  1  -  Comparison  of  UMMW  semiconductor  device   matching  to  the  load  line,  we  might  choose  the
          technologies                                         device geometry (i.e. width) to provide a 50 Ohm

           Technology    fmax   VSUP   VK   IMAX   PRF   RLL   load line. The top plot in Fig. 4 indicates the output
                                                               power that is developed by each device technology.
                     (GHz)   (V)   (V)   (A/mm)   (W/mm)   (mm)
                                                               For instance, the InP process will produce 15 dBm
           InP HBT   600    2.5   0.7   3    1.4   1.2         while the SiGe process will produce roughly 6 dBm.
                                                               The  GaN  HEMT  would  deliver  around  30  dBm
           SiGe HBT   450   1.3   0.5   2.2   0.44   0.7
                                                               output power. For a 20-dBm target power outlined
           CMOS      310   1.1   0.3   1   0.2     1.6         in Section 2, the InP HBT and GaN HEMT are closest
           GaN       400   12   2   1.6    4.0     12.5        to the target for a 50-Ohm match.
           HEMT
                                                               Table  2  -  Theoretical  efficiency  bounds  for  20  dBm  output
          Based on the supply voltage and the knee voltage,    power at 140 GHz
          the maximum output power can be calculated from                         InP     SiGe    CMOS    GaN
               1                                                Technology
          P RF  = (V DD  − V )I MAX  while   the   load-line                      HBT     HBT     FET     HEMT
                         K
               4
          resistance  is  R LL  = 2(V DD  − V )/I MAX  .  The  RF   PAE (Q = 1000)   45%   34%    32%     43%
                                       K
          output power and load-line resistance is shown in     PAE (Q = 10)      39%     24%     23%     34%
          Table 1 when normalized to 1 mm. The high supply
          voltage  of  the  GaN  HEMT  due  to  breakdown       Conduction Angle   203°   222°    260°    232°
          characteristics  suggests  high  power  density  and
          load-line resistance relative to the other processes.    Second, we might also compare the technologies for
                                                               a fixed output power such as 20 dBm in Fig. 4. The
          We  compare  these  technologies  in  two  different   device  presenting  a  load-line  matching  condition
          ways  to  understand  device  selection  for  high   closest to 50 Ohms is the most desirable from the
          efficiency. On one hand, we would choose a device    standpoint of PAE. Notably, the InP HBT is the best
          that offers a load line close to 50 Ohm to avoid loss   choice  as  GaN  HEMT  presents  a  large  load-line





                                             © International Telecommunication Union, 2021                    43
   50   51   52   53   54   55   56   57   58   59   60