Page 792 - 5G Basics - Core Network Aspects

2 Transport aspects

Figure 10-19 – Example of two registers, each representing a
VF sample component

Figure 10-20(a) depicts an example of the reported bits (shown shaded) for a block of VF samples for
different padding types, with F_block=2, B_min=2, B_max=7, L_w=5, rounding=0, and Figure 10-20(b) uses
L_w=6.

F_block = 2 , B_min = 2 , B_max = 7 , L_w = 5 , rounding = 0
MSB LSB MSB LSB MSB LSB
B_max = 7 3 2 1 0 B_max = 7 4 3 2 1 0 B_max = 7 3 2 1 0 –1

1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 0 0
1 1 1 1 1 0 0 1 1 1 1 1 1 0 0 1 1 1 1 1 1 0 0 1 0

S = 3 B_L = 2 B_M = 4 S = 3 B_L = 0 S = 3 B_L = –1
B_M = 3 B_M = 3
L_w = 5, B_min = 2, L_w = 5, B_min = 2, L_w = 5, B_min = 2,
padding = 0 padding = 1, with sign-extension padding = 1, with zero-padding
NOTE 1 – The value of S shown in this example is assumed to be the largest value in F_block = 2.
NOTE 2 – Use of padding = 0 (padding disabled) with F_block = 1 is an invalid configuration.
a)

F_block = 2, B_min = 2 , B_max = 7 , L_w = 6 , rounding = 0
MSB LSB MSB LSB MSB LSB
B_max = 7 3 2 1 0 B_max = 7 5 4 3 2 1 0 B_max = 7 3 2 1 0 –1 –2

1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 0 0 0
1 1 1 1 1 0 0 1 1 1 1 1 1 0 0 1 1 1 1 1 1 0 00 1 0 0

S = 3 B_L = 2 B_M = 5 S = 3 B_L = 0 S = 3 B_L = –2
B_M = 3 B_M = 3
L_w = 6, B_min = 2, L_w = 6, B_min = 2, L_w = 6, B_min = 2,
padding = 0 padding = 1, with sign-extension padding = 1, with zero-padding
NOTE 1 – The value of S shown in this example is assumed to be the largest value in F_block = 2.
NOTE 2 – Use of padding = 0 (padding disabled) with F_block = 1 is an invalid configuration.
b) G.9701(14)-Cor.1(15)_F10-20

Figure 10-20 – Example of reported bits for a block of VF samples for
different padding types without rounding

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