Page 1338 - 5G Basics - Core Network Aspects

2 Transport aspects

After FEC encoding, the data and parity bits are distributed to all four lanes, in groups of 10-bits, in a round
robin distribution scheme from the lowest to the highest numbered lanes. The resulting per-lane
transmitted values of the AM fields are illustrated in Table 11-1 where the transmission order is from left to
right. In other words, for example, AM0 is transmitted in Lane 0, AM1 is transmitted in Lane 1, etc., and the
bits of each 10-bit word are transmitted MSB first.
NOTE 1 – The inverse multiplexing function is based on clause 91 [IEEE 802.3-2015].
NOTE 2 – The mechanism is compatible and can reuse optical modules being developed for IEEE 100GBASE-R4, with
OTU4 rate support.
NOTE 3 – The electrical specifications for an FOIC1.4 25G lane is found in [b-OIF CEI IA].

Table 11-1 – AM bit distribution over the four FOIC1.4 lanes

Lane 0 Lane 1 Lane 2 Lane 3
AM bits 10-bit symbol of AM0 10-bit symbol of AM1 10-bit symbol of AM2 10-bit symbol of AM3
1 – 40 0101100101 0101100101 0101100101 0101100101

41 – 80 0100100110 0100100110 0100100110 0100100110
81 – 120 0100011011 0100001000 0100011000 0100010110
121 – 160 0110100110 0010100110 1010100110 1010100110
161 – 200 1010110110 1010110110 1010110110 1010110110

201 – 240 0110111001 0110111110 0110110111 0110110010
241 – 280 1011100000 0110010110 1111011111 0001011000
281 – 320 0010001110 1001111011 0011001111 0100000001
321 – 360 1100111101 0111111000 0110101010 0000101111

361 – 400 1001000111 0110011010 0000001000 0111101001
401 – 440 1111011100 0101100001 0011001100 1110111111
441 – 480 0100110000 0010000001 0010010101 1011110100
NOTE – Transmission order of each 10-bit word is left-to-right (MSB first). The transmission order within the FlexO
frame is left-to-right across the row, and down the table. The transmission order for each lane is per-word and
down the table.

11.1.1 FOIC1.4 skew tolerance requirements

The lane skew tolerance requirement is 180ns.
NOTE – These requirements are in line with CAUI4 [IEEE 802.3-2015].
11.1.2 FOIC1.4 28G lane bit rate

The FOIC1.4 lane is synchronous to the FlexO frame. There are four lanes.
FOIC1.4_lane_rate = 100G_FlexO_rate/4
= 1/4 × 256/241 × 239/226 × 99 532 800 kbit/s ±20 ppm
NOTE – The nominal lane rate is approximately: 27 952 368.611 kbit/s

The 100G_FlexO_rate is specified in clause 8.4.
This results in a FOIC1.4 lane bit rate with a -4.46 ppm offset from the OTL4.4 nominal bit rate.

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