Page 1328 - 5G Basics - Core Network Aspects

2 Transport aspects

The FEC encoder processes 20 * 257-bit data blocks, resulting in the 5140 data bits in the FEC codeword
(row), and generates 20 * 15 = 300 bits of FEC parity.
NOTE – The FlexO FEC is based on RS10 (544, 514), as specified in clause 91 of [IEEE 802.3-2015] for 100GBASE-KP4
interfaces.

9 Alignment markers and overhead

The FlexO AM and OH areas consist of 1,280 bits, and are part of the FlexO frame structure. It includes
information to support group management and alignment functions. The FlexO AM and OH is terminated
where the FlexO frame is assembled and disassembled.

An overview of FlexO AM and OH areas is presented in Figure 9-1.

Figure 9-1  Overhead overview

9.1 Lane alignment markers (AM)

Lane alignment markers are used for lane alignment, lane delineation, lane ordering and lane deskewing.
The AM area length for a FlexO frame is defined as 960 bits, which is a place holder for up to eight 120-bit
lane alignment markers.
A lane alignment marker in Figure 9-2 consists of a common portion across all lanes, a unique portion per
lane and some pad bits.
– CMx = 8-bit common marker field (common across lanes) – used for aligning lanes
– UMx = 8-bit unique marker field – used for identifying lanes
– UPx = 8-bit unique pad field – used for providing a DC balance when multiplexing lanes
NOTE – Alignment marker area length specified by clause 91 [IEEE 802.3-2015] for 100 Gbit/s Ethernet interfaces, is
1285-bit per AM FEC frame period (every 4096 FEC codewords). It consists of 20 AM blocks of 64-bit, plus 5-bit extra
padding required for 257b block alignment. Since the FlexO adaptation method described in this document does not
rely on 257b blocks, the five padding bits are unnecessary.

Figure 9-2  FlexO lane alignment marker format

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