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2                                                 Transport aspects


                                     Table 17-12 – m, n and CnD for CBR clients into OPU4

                                                         Bit-rate
                                     Nominal bit rate
                  Client signal                         tolerance       m             n             CnD
                                        (kbit/s)
                                                         (ppm)
             100GBASE-R (see          103 125 000         100         640            8             Yes
             17.7.5.1)


                                      Table 17-13 – Replacement signal for CBR clients

                  Client signal                   Replacement signal                 Bit-rate tolerance (ppm)

             100GBASE-R             Continuous 100GBASE-R local fault sequence ordered       100
             (see 17.7.5.1)         sets with 20 PCS lane alignment markers inserted after
                                    each 16383 x 20 sixty-six-bit blocks

            A 100GBASE-R local fault sequence ordered set is a 66B control block (sync header = 10) with a block type
            of 0x4B, an "O" code of 0x00, a value of 0x01 to indicate a "local fault" in lane 3, and all of the other octets
            (before scrambling) equal to 0x00.

            17.7.5.1   100GBASE-R multi-lane processing

            The  100GBASE-R  client  signal  (64B/66B  encoded,  nominal  aggregate  bit-rate of  103 125 000 kbit/s  100
            ppm) is recovered using the process described in Annex E for parallel 64B/66B interfaces. The lane(s) of the
            physical interface are bit-disinterleaved, if necessary, into twenty streams of 5 161 250 kbit/s. 66B block
            lock  and  lane  alignment marker  lock  are  acquired on  each PCS  lane,  allowing  the  66B  blocks  to  be  de-
            skewed and reordered.

            In the mapper, the received Ethernet PCS lane BIP may be compared with the expected Ethernet PCS lane
            BIP as a non-intrusive monitor.

            The de-mapper will pass through the PCS lane BIP from the ingress as described in Annex E. In addition, the
            received  Ethernet  PCS  lane  BIP  may  be  compared  with  the  expected  Ethernet  PCS  lane  BIP  as  a  non-
            intrusive monitor.

            For 100GBASE-R client mapping, 1-bit timing information (C1) is not needed.
            The  de-mapper  will  recover  from  the  output  of  the  GMP  processor  64B/66B  block  lock  per  the  state
            diagram in Figure 82-10 [IEEE 802.3]. The 66B blocks are re-distributed round-robin to PCS lanes. If the
            number of PCS lanes is greater than the number of physical lanes of the egress interface, the appropriate
            numbers of PCS lanes are bit-multiplexed onto the physical lanes of the egress interface.

            17.8    Mapping a 1000BASE-X and FC-1200 signal via timing transparent transcoding into OPUk

            17.8.1  Mapping a 1000BASE-X signal into OPU0
            Refer to clause 17.7.1 for the mapping of the transcoded 1000BASE-X signal and to clause 17.7.1.1 for the
            transcoding of the 1000BASE-X signal.

            17.8.2  Mapping an FC-1200 signal into OPU2e
            The nominal line rate for FC-1200 is 10 518 750 kbit/s ± 100 ppm, and must therefore be compressed to a
            suitable rate to fit into an OPU2e.
            The adaptation of the 64B/66B encoded FC-1200 client is done by transcoding a group of eight 66B blocks
            into one 513B block (as described in Annex B), assembling eight 513B blocks into one 516-octet superblock
            and encapsulating seventeen 516-octet superblocks into an 8800 octet GFP frame as illustrated in Figure
            17-17.  The  GFP  frame consists of  2200  rows  with  32  bits  per  row.  The  first row contains  the GFP core
            header, the second row the GFP payload header. The next four rows contain 16 bytes reserved for future
            international standardization. The next seventeen times 129 rows contain the seventeen superblocks #1 to


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