Rec. ITU-T V.034 (09/1994) … A MODEM OPERATING AT DATA SIGNALLING RATES OF UP TO 28800 bit/s ...
FOREWORD
CONTENTS
1 Scope
2 References
3 Definitions
4 Abbreviations
5 Line Signals
    5.1 Data Signalling Rates
    5.2 Symbol Rates
    5.3 Carrier Frequencies
    5.4 Pre-emphasis
6 DTE Interfaces
    6.1 Synchronous Interfacing (Primary Channel Only)
    6.2 Asynchronous Character-mode Interfacing
    6.3 Half-duplex Mode Interfacing
    6.4 Electrical Characteristics of Interchange Circuits
    6.5 Fault Condition on Interchange Circuits
    6.6 Thresholds and Response Times of Circuit 109
7 Scrambler
8 Framing
    8.1 Overview
    8.2 Mapping Frame Switching
    8.3 Multiplexing of Primary and Auxiliary Channel Bits
9 Encoder
    9.1 Signal Constellations
    9.2 Mapping Parameters
    9.3 Parser
    9.4 Shell Mapper
    Definitions:
    Algorithm:
    9.5 Differential Encoder
    9.6 Mapper, Precoder and Trellis Encoder
    9.7 Non-linear Encoder
10 Start-up Signals and Sequences
    10.1 Signals and Sequences Used in Duplex Operation
    10.2 Signals and Sequences Used in Half-duplex Operation
11 Duplex Operating Procedures
    11.1 Phase 1 – Network Interaction
    11.2 Phase 2 – Probing/Ranging
    11.3 Phase 3 – Equalizer and Echo Canceller Training
    11.4 Phase 4 – Final Training
    11.5 Retrains
    11.6 Rate Renegotiation
    11.7 Cleardown
    11.8 Two-wire Leased Line Operation
12 Half-duplex Operating Procedures
    12.1 Phase 1 – Network Interaction
    12.2 Phase 2 – Probing
    12.3 Phase 3 – Primary Channel Equalizer Training
    12.4 Control Channel Start-up
    12.5 Primary Channel Resynchronization Procedure
    12.6 Control Channel Resynchronization Procedure
    12.7 Primary Channel Retrains
    12.8 Control Channel Retrains
13 Testing Facilities
14 Glossary
    14.1 Variables and Parameters used in Data mode