Rec. ITU-T G.9992 (03/2019) - Indoor optical camera communication transceivers – System architecture, physical layer and data link layer specification
Summary
History
FOREWORD
Table of Contents
1 Scope
2 References
3 Definitions
     3.1 Terms defined elsewhere
     3.2 Terms defined in this Recommendation
4 Abbreviations and acronyms
5 Conventions
     5.1 Bit ordering convention
     5.2 Endpoint node
6 System architecture and reference models
     6.1 System architecture and topology
          6.1.1 Modes of operation
          6.1.2 Dual-channel operation
     6.2 Reference models
          6.2.1 Protocol reference model of transceiver
          6.2.2 Interfaces – functional description
               6.2.2.1 A-interface
               6.2.2.2 Physical medium-independent interface
               6.2.2.3 Medium-dependent interface
               6.2.3 Functional model of an ITU-T G.9992 transceiver
7 Profiles
     7.1 Reduced-complexity profile
     7.2 Standard profile
8 Physical layer specification
     8.1 SISO transmission
          8.1.1 Functional model of the PHY
          8.1.2 Physical coding sublayer
               8.1.2.1 PHY frame
               8.1.2.2 MPDU mapping
               8.1.2.3 PHY-frame header
                    8.1.2.3.1 Common part fields
                         8.1.2.3.1.1 Frame type
                         8.1.2.3.1.2 Header check sequence
                    8.1.2.3.2 Variable part fields
                         8.1.2.3.2.1 ID PHY-frame type specific fields
                              8.1.2.3.2.1.1 ID Length
                              8.1.2.3.2.1.2 Destination ID field present indication
                              8.1.2.3.2.1.3 Parity bit
                              8.1.2.3.2.1.4 Source ID
                              8.1.2.3.2.1.5 Destination ID
                         8.1.2.3.2.2 MSG-D PHY-frame type specific fields
                              8.1.2.3.2.2.1 ID length
                              8.1.2.3.2.2.2 Destination ID field present indication
                              8.1.2.3.2.2.3 Parity bit
                              8.1.2.3.2.2.4 Source ID
                              8.1.2.3.2.2.5 Destination ID
                              8.1.2.3.2.2.6 Payload length (PL)
                         8.1.2.3.2.3 MSG-S PHY-frame type specific fields
                              8.1.2.3.2.3.1 Parity bit (PB)
                              8.1.2.3.2.3.2 Payload length
          8.1.3 Physical medium attachment sublayer
               8.1.3.1 Segmentation to UPWM symbols
               8.1.3.2 Segmentation to UPPM symbols
          8.1.4 Physical medium dependent sublayer
               8.1.4.1 UPWM modulation
                    8.1.4.1.1 m-DC mapping
                         8.1.4.1.1.1 m-DC mapping when m is the integral power of 2
                         8.1.4.2.1.2 m-DC mapping when m is non-integral power of 2
                    8.1.4.1.2 UPWM modulator
                         8.1.4.1.2.1 Complementary operation
                         8.1.4.1.2.2 PWM segment generation
                         8.1.4.1.2.3 Concatenation and repetition
                    8.1.4.1.3 UPWM preamble signal
               8.1.4.2 UPPM modulation
                    8.1.4.2.1 Determination of modulation schemes for UPPM
                         8.1.4.2.1.1 VMPPM modulation scheme
                    8.1.4.2.2 UPPM modulator
                         8.1.4.2.2.1 Complementary operation
                         8.1.4.2.2.2 UPPM waveform segment generation
                         8.1.4.2.2.3 Concatenation and repetition
                    8.1.4.2.3 UPPM preamble/delimiter/valid data waveforms
                         8.1.4.2.3.1 Start delimiter
                         8.1.4.2.3.2 Valid data
                         8.1.4.2.3.3 End delimiter
                         8.1.4.2.3.4 UPPM preamble signal
          8.1.5 PSD mask specifications
          8.1.6 Electrical specifications
               8.1.6.1 Transmit clock tolerance
          8.1.7 Transmitter EVM requirements
          8.1.8 Termination impedance
          8.1.9 Total transmit power
     8.2 UPWM-based MIMO transmission
          8.2.1 Functional model of the PHY
          8.2.2 Physical coding sublayer
               8.2.2.1 PHY frame
               8.2.2.2 MPDU mapping
               8.2.2.3 PHY-frame header
          8.2.3 Physical medium attachment sublayer
               8.2.3.1 UPWM-based MIMO PHY frame
               8.2.3.2 MIMO header
                    8.2.3.2.1 Ext_Ind
                    8.2.3.2.2 LastPortInd
                    8.2.3.2.3 PortID
                    8.2.3.2.4 PB
                    8.2.3.2.5 PortID_Ext
                    8.2.3.2.6 PB_Ext
               8.2.3.3 MIMO payload
               8.2.3.4 Segmentation to UPWM symbols
          8.2.4 Physical medium dependent sublayer
               8.2.4.1 m-DC mapping
               8.2.4.2 UPWM modulator
               8.2.4.3 UPWM preamble signal
               8.2.4.4 MMI symbol
          8.2.5 PSD mask specifications
          8.2.6 Electrical specifications
               8.2.6.1 Transmit clock tolerance
          8.2.7 Transmitter EVM requirements
          8.2.8 Termination impedance
          8.2.9 Total transmit power
     8.3 UPPM-based MIMO transmission
          8.3.1 Functional model of the PHY
          8.3.2 Physical coding sublayer
               8.3.2.1 PHY frame
               8.3.2.2 MPDU mapping
               8.3.2.3 PHY-frame header
          8.3.3 Physical medium attachment sublayer
               8.3.3.1 UPPM-based MIMO PHY frame
               8.3.3.2 UPPM-based MIMO payload
               8.3.3.3 Segmentation to UPPM-based MIMO symbols
          8.3.4 Physical medium dependent sublayer
               8.3.4.1 Pilot symbol
          8.3.5 PSD mask specifications
          8.3.6 Electrical specifications
               8.3.6.1 Transmit clock tolerance
          8.3.7 Transmitter EVM requirements
          8.3.8 Termination impedance
          8.3.9 Total transmit power
     8.4 Control parameters
9 Data link layer specification
     9.1 Functional model of DLL and frame formats
          9.1.1 Application protocol convergence sublayer
          9.1.2 Logical link control sublayer
               9.1.2.1 LLC frame format
                    9.1.2.1.1 LLC frame header
                         9.1.2.1.1.1 LLC frame type (LLCFT)
                         9.1.2.1.1.2 Frame length
                         9.1.2.1.1.3 OriginatingNode
                         9.1.2.1.1.4 DestinationNode
                    9.1.2.1.2 LCDU frame format
                    9.1.2.1.3 APDU frame format
          9.1.3 Medium access control sublayer
               9.1.3.1 Assembling of MPDUs
     9.2 Addressing scheme
          9.2.1 Node identifier
          9.2.2 Address association table
Annex A  Application protocol convergence sublayer
     A.1 Ethernet APC
          A.1.1 Frame conversion
          A.1.2 Management plane
     A.2 Other types of APC
Bibliography