Table of Contents

 1     Scope          
 2     References
 3     Definitions 
        3.1     Terms defined elsewhere        
        3.2     Terms defined in this Recommendation            
 4     Abbreviations and acronyms             
 5     Conventions             
 6     Physical layer frequency performance requirements             
 7     T-BC packet layer performance requirements for full timing support from the network         
        7.1     Constant phase/time error and dynamic time error noise generation  
        7.2     Noise tolerance            
        7.3     Noise transfer               
        7.4     Transient response and holdover performance             
        7.5     Interfaces       
Annex A – Telecom boundary clock model    
Annex B – Control of transient due to rearrangements in the synchronous Ethernet network    
Annex C – Telecom time slave clock requirements    
        C.1     Physical layer frequency performance requirements  
        C.2     T-TSC packet layer performance requirements for full timing support from the network    
Appendix I – Mitigation of time error due to SyncE/SDH transients    
Appendix II – Derivation of T-BC output transient mask due to SyncE/SDH rearrangement    
       II.1     Background on assumptions for, and derivation of, T-BC output phase error due to a SyncE/SDH rearrangement    
      II.2      T-BC output phase transient masks      
Appendix III – Background to performance requirements of the T-BC    
      III.1     Noise generation requirements            
      III.2     Noise tolerance            
      III.3     Noise transfer
      III.4     Holdover          
Appendix IV – T-BC dynamic time error noise generation TDEV    
Appendix V – T-TSC dynamic time error noise generation TDEV