1     Scope         
 2     References              
 3     Definitions 
 4     Abbreviations and acronyms            
 5     Network limits for the maximum output jitter and wander at an OTUk
interface         
        5.1     Network limits for jitter          
        5.2     Network limits for wander      
 6     Jitter and wander tolerance of network interfaces    
        6.1     Jitter and wander tolerance of OTN interfaces             
        6.2     Jitter and wander tolerance of client interfaces            
Annex A – Specification of the ODUk clock (ODC)     
        A.1     Scope            
        A.2     Applications  
        A.3     Frequency accuracy   
        A.4     Pull-in and pull-out ranges     
        A.5     Noise generation       
        A.6     Noise tolerance         
        A.7     Jitter transfer             
        A.8     Transient response    
Appendix I – Relationship between network interface jitter requirements and
input jitter tolerance     
        I.1               Network interface jitter requirements     
        I.2               Input jitter tolerance of network equipment         
Appendix II – Effect of OTN on the distribution of synchronization via STM-N
and synchronous Ethernet clients     
       II.1     Introduction   
       II.2     Provisional synchronization reference chain     
       II.3     Synchronization network limit 
       II.4     Variable channel memory       
       II.5     Maximum buffer hysteresis     
Appendix III – Hypothetical reference model (HRM) for 3R regenerator jitter
accumulation     
Appendix IV – 3R regenerator jitter accumulation analyses     
       IV.1     Introduction  
       IV.2     Model 1        
       IV.3     Model 2        
       IV.4     Jitter generation of regenerators using parallel serial
conversion         
Appendix V – Additional background on demapper (ODCp) phase error and demapper
wideband jitter generation requirements     
        V.1     Introduction  
        V.2     Demapper phase error           
        V.3     Demapper wideband jitter generation due to gaps produced by
fixed overhead in OTUk frame     
Appendix VI – OTN atomic functions     
       VI.1     Introduction  
Appendix VII – Hypothetical reference models (HRMs) for CBRx (SDH and
synchronous Ethernet client) and ODUj[/i] payload jitter and short-term wander
accumulation     
      VII.1     Introduction  
      VII.2     OTN hypothetical reference models   
      VII.3     Impact of the insertion of OTN islands in the ITU-T G.803
synchronization reference chain     
Appendix VIII – CBRx and ODUj[/i] payload jitter and short-term wander
accumulation analyses     
     VIII.1     Introduction  
     VIII.2     Simulation model      
     VIII.3     Jitter and short-term wander simulation results           
Bibliography