Packet loss concealment (PLC) algorithms, also known as frame erasure concealment algorithms, hide transmission losses in audio systems where the input signal is encoded and packetized, sent over a network, received and decoded before play out. PLC algorithms can be found in most standard CELP-based speech coders. The algorithm described here provides a method for [ITU‑T G.722].
The decoder comprises three stages: lower sub-band decoding, higher sub-band decoding and quadrature mirror filter (QMF) synthesis. In the absence of frame erasures, the decoder structure is identical to G.722, except for the storage of the two decoded signals, of the high and low bands. In case of frame erasures, the decoder is informed by the bad frame indication (BFI) signalling. It then performs an analysis of the past lower-band reconstructed signal and extrapolates the missing signal using linear‑predictive coding (LPC), pitch-synchronous period repetition and adaptive muting. Once a good frame is received, the decoded signal is cross-faded with the extrapolated signal. In the higher band, the decoder repeats the previous frame pitch-synchronously, with adaptive muting and high‑pass post-processing. The ADPCM states are updated after each frame erasure.
The PLC algorithm described in this appendix meets the same quality requirements as the PLC in Appendix III of [ITU-T G.722], but with a lower complexity. Almost no additional complexity is added compared with normal G.722 decoding (worst-case additional complexity is 0.07 WMOPS). An alternative quality-complexity trade-off is provided by Appendix III.
This edition includes the revision of Appendix IV approved 07/2007, which corrects defects in the original C source code (Release 1.0.a) approved 11/2006. The revised C source code is labelled Release 1.1 and is available as an electronic attachment to this Appendix.