1
Scope
2 References
3 Terms and definitions
4 Acronyms and abbreviations
5 Conventions
6 Basic multiplexing principles
6.1 Multiplexing structure
6.2 Basic frame structure
6.3 Hierarchical
bit rates
6.4 Interconnection of STM-Ns
6.5 Scrambling
6.6 Physical specification of the NNI
7 Multiplexing method
7.1 Multiplexing of administrative units into STM-N
7.2 Multiplexing of
tributary units into VC-4 and VC-3
7.3 AU-n/TU-n numbering scheme
8
Pointers
8.1 AU-n pointer
8.2 TU-3 pointer
8.3 TU-2/TU-1 pointer
9 Overhead bytes description
9.1 Types of overhead
9.2 SOH description
9.3 POH descriptions
10 Mapping of
tributaries into VC-n
10.1 Mapping of G.702 type signals
10.2 Mapping of ATM cells
10.3 Mapping of HDLC framed signals
10.4 Mapping of DQDB into VC-4
10.5 Asynchronous mapping for FDDI at 125 000 kbit/s into VC-4
10.6 Mapping of GFP frames
11 VC concatenation
11.1 Contiguous concatenation of X VC-4s (VC-4-Xc, X = 4, 16, 64, 256)
11.2 Virtual concatenation of X VC-3/4s (VC-3/4-Xv, X = 1 ... 256)
11.3 Contiguous concatenation of X VC-2s in a higher order VC-3 (VC-2-Xc,
X = 1 … 7)
11.4 Virtual concatenation of X VC-2/1s
Annex A – Forward error correction for STM-64, and
STM-256
A.1 Network reference model
A.2 The FEC function
A.3 Mapping into the SDH frame
A.4 In-band FEC regenerator functions
A.5 Performance monitoring
A.6 FEC activation and deactivation
A.7 Performance of in-band FEC
Annex B – CRC-7 polynomial algorithm
B.1 Multiplication/division process
B.2 Encoding procedure
B.3 Decoding
procedure
Annex C – VC-4-Xc/VC-4/VC-3 tandem connection
monitoring protocol: Option 1
C.1 Tandem connection overhead – Byte location
C.2 Definitions
C.3 Tandem connection bundling
C.4 Incoming Error Count (IEC)
C.5 B3 compensation
C.6 Data link
C.7 Treatment of incoming signal failures
C.8 Tandem connection idle signal
C.9 Tandem connection test signal
Annex D – VC-4-Xc/VC-4/VC-3 tandem connection
monitoring protocol: Option 2
D.1 N1 byte structure
D.2 TCM functionality at the tandem connection source
D.3 TCM functionality at the TANDEM connection sink
D.4 BIP-8 compensation
Annex E – VC-2/VC-1 tandem connection monitoring
protocol
E.1 N2 byte structure
E.2 TCM functionality at the tandem connection source
E.3 TCM functionality at the tandem connection sink
E.4 BIP-2 compensation
Annex F – Transport of 10 Gbit/s Ethernet in a
VC-4-64c
F.1 Mapping of Ethernet MAC into VC-4-64c using 64B/66B coding
Appendix I – Relationship between TU-2 address and
location of columns within a VC-4
Appendix II – Relationship between TU-12 address and
location of columns within a VC‑4
Appendix III – Relationship between TU-11 address and
location of columns within a VC-4
Appendix IV – Relationship between TU-2 address and
location of columns within a VC‑3
Appendix V – Relationship between TU-12 address and
location of columns within a VC-3
Appendix VI – Relationship between TU-11 address and
location of columns within a VC-3
Appendix VII –
Enhanced Remote Defect Indication (RDI)
VII.1 VC-4-Xc/VC-4/VC-3
paths
VII.2 VC-2/VC-1 paths
Appendix VIII – Unexpected behaviour, dependence of TC
monitoring on the incoming signal
VIII.1 Entering AIS condition (in case of VC-3/4/4-Xc)
VIII.2 Entering AIS condition (in case of VC-1/2)
VIII.3 Recovery from a phase jump (valid for all VC-n)
Appendix IX – Forward error correction for STM-16
Appendix X – Performance of in-band FEC
Appendix XI – Nominal justification ratios for asynchronous
mapping of ODU1 into C-4-17c and ODU2
into C-4-68c
Appendix XII – Consideration on 10 Gbit/s Ethernet WAN
clock accuracy
Appendix XIII – Example LCAS control packet CRC
calculations
Bibliography