1 Scope
2 References
3 Definitions
3.1 Terms defined elsewhere
3.2 Terms defined in this Recommendation
4 Abbreviations and acronyms
5 Conventions
6 Use of PTP for phase/time distribution
6.1 High-level design requirements
6.2 PTP modes and options
6.3 PTP modes
6.4 PTP mapping
6.5 Message rates
6.6 Unicast message negotiation
6.7 Alternate BMCA, telecom slave model and master selection process
6.8 Phase/time traceability information
6.9 Use of alternate master flag
7 ITU-T PTP profile for phase/time distribution with partial timing support from the network
8 Security aspects
Annex A – ITU-T PTP profile for time distribution with partial timing support from the network (unicast mode)
A.1 Profile identification
A.2 PTP attribute values
A.3 PTP options
A.4 Best master clock algorithm options
A.5 Path delay measurement option (delay request/delay response)
A.6 Configuration management options
A.7 Clock identity format
A.8 Security aspects
A.9 Other optional features of IEEE 1588
A.10 PTP common header flags
Annex B – Options to establish the PTP topology with the Alternate BMCA
Annex C – Inclusion of an external phase/time input interface on a PTP clock
Annex D – TLV for PTP interface rate (optional)
Annex E – Synchronization uncertain indication (optional)
Annex F – Mapping from PTP clockClass values to quality levels
Appendix I – Considerations on the use of priority2
Appendix II – Considerations on a T-TSC-A or T-TSC-P connected to an end application
Appendix III – PTP monitoring backup scenario example
Appendix IV – Description of PTP clock states and associated contents of Announce messages
IV.1 Purpose of the appendix
IV.2 Description of the states
IV.3 Example of mapping between PTP port states and PTP clock states for a 3‑port T-BC
IV.4 T-GM Announce message contents based on the internal PTP clock states
IV.5 T-BC Announce message contents based on the internal PTP clock states
Appendix V – BMCA cycling between masters
V.1 Scenario where a PTP clock's BMCA cycles between two masters
V.2 Approaches to avoid a PTP clock's BMCA from cycling between two masters
Appendix VI – Considerations of PTP over IP transport in ring topologies