CONTENTS

 1     Introduction
        1.1     Scope
        1.2     Abbreviations
        1.3     Definitions
 2     Mapping of ATM cells into 1544 kbit/s
        2.1     Frame format
        2.2     Cell rate adaptation
        2.3     Header Error Control (HEC) generation
        2.4     Scrambling of the ATM cell payload (optional)
        2.5     Cell delineation
        2.6     Cell header verification and extraction
        2.7     Physical layer OAM
 3     Mapping of ATM cells into 2048 kbit/s
        3.1     Frame format
        3.2     Cell rate adaptation
        3.3     Header Error Control (HEC) generation
        3.4     Scrambling of the ATM cell payload
        3.5     Cell delineation
        3.6     Cell header verification and extraction
        3.7     Physical layer OAM
 4     Mapping of ATM cells into 6312 kbit/s
        4.1     Frame format
        4.2     Cell rate adaptation
        4.3     Header Error Control (HEC) generation
        4.4     Scrambling of the ATM cell payload
        4.5     Cell delineation
        4.6     Cell header verification and extraction
        4.7     Physical layer OAM
 5     Mapping of ATM cells into 8448 kbit/s
 6     Mapping of ATM cells into 34 368 kbit/s
        6.1     Frame format
        6.2     Cell rate adaptation
        6.3     Header Error Control (HEC)
        6.4     Scrambling of the ATM cell payload
        6.5     Cell delineation
        6.6     Cell header verification and extraction
        6.7     Physical layer OAM
 7     Mapping of ATM cells into 44 736 kbit/s
        7.1     Frame format
        7.2     PLCP-based mapping of ATM cells
                  7.2.1     Cell rate adaptation
                  7.2.2     Header Error Control (HEC) generation
                  7.2.3     Cell delineation
                  7.2.4     Cell header verification and extraction
                  7.2.5     Physical layer OAM
        7.3     HEC-based mapping of ATM into 44 736 kbit/s
                  7.3.1     Mapping of ATM cells into 44 736 kbit/s multiframe
                  7.3.2     Cell rate adaptation
                  7.3.3     Header Error Control (HEC) generation
                  7.3.4     Cell delineation
                  7.3.5     Cell header verification and extraction
                  7.3.6     Physical layer OAM
 8     Mapping of ATM cells into 97 728 kbit/s
        8.1     Frame format
        8.2     Cell rate adaptation
        8.3     Header Error Control (HEC) generation
        8.4     Scrambling of the ATM cell payload
        8.5     Cell delineation
        8.6     Cell header verification and extraction
        8.7     Physical layer OAM
 9     Mapping of ATM cells into 139 264 kbit/s
        9.1     Frame format
        9.2     Cell rate adaptation
        9.3     Header Error Control (HEC) generation
        9.4     Scrambling of the ATM cell payload
        9.5     Cell delineation
        9.6     Cell header verification and extraction
        9.7     Physical layer OAM